ISA_DB
A free reference for CPU and GPU instruction sets - x86, ARM, RISC-V, PowerISA, NVIDIA PTX, and AMDGPU - with opcode tables, encoding diagrams, and cross-vendor comparisons.
CPU Architectures
A native, general-purpose CPU instruction set architecture spanning embedded, server, and HPC implementations.
The dominant native CPU instruction set architecture for desktop, server, and laptop computing.
A native, license-based CPU instruction set architecture powering mobile, embedded, and increasingly server and desktop systems.
An open, royalty-free native CPU instruction set architecture with a modular base-plus-extensions design.
GPU Architectures
A portable, low-level virtual GPU instruction set that NVIDIA's compiler stack lowers to a native target architecture (SASS) at install- or run-time. PTX is versioned text, not a stable binary encoding - the same PTX instruction can compile to different native machine code depending on the selected target.
Targets: sm_70 (Volta), sm_80 (Ampere), sm_90 (Hopper)
AMD's native, low-level GPU instruction set family, assembled directly (no virtual intermediate layer). Supported instructions and their exact encodings vary by GFX compatibility target.
Targets: gfx942 (CDNA3 / Instinct MI300), gfx1100 (RDNA3)
Cross-Architecture Comparisons
See how x86, ARM, RISC-V, and PowerISA each express the same operation, including where an architecture has no instruction for it and why.
Compare PTX and AMDGPU instructions by concept - integer/float arithmetic, memory, atomics, barriers, matrix multiply, and more.
Tools and Data
Paste a 32-bit instruction word and get the mnemonic with every field broken out. Only encodings whose bit pattern rebuilds their own opcode are included, so it declines to guess.
The whole corpus as a download, released into the public domain. No permission and no attribution required, and it ships the report showing how its accuracy was measured.